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DATA SHEET
MOS INTEGRATED CIRCUIT
PD160010
384-/360-OUTPUT TFT-LCD SOURCE DRIVER (COMPATIBLE WITH 256 GRAY SCALES, mini-LVDS INTERFACE SUPPORTED)
DESCRIPTION
The PD160010 is a source driver for TFT-LCDS that supports the display of 256 gray scales and employs mini-LVDS interface. Which can realize a full-color display of 16,777,216 colors by output of 256 values -corrected by an internal D/A converter and 10-by-2 external power modules. Because the output dynamic range is as large as VSS2 + 0.2 V to VDD2 - 0.2 V, level inversion operation of the LCD's common electrode is rendered unnecessary. Also, to be able to deal with dot-line inversion, n-line inversion, this source driver is equipped with a built-in 8-bit D/A converter circuit whose odd output pins and even output pins respectively output gray scale voltages of differing polarity. Because of the incorporation of mini-LVDS interface, the data transfer speed has improved and the amount of wiring on the PCB has been significantly reduced. Remark "mini-LVDS" is the technology with Texas Instruments applied LVDS technology and developed. (LVDS: Low Voltage Differential Signaling)
FEATURES
* Differential interface: CLK, gray scale data, * CMOS interface: STHR(L), R,/L, STB, SB, POL, Osel, Vsel1, Vsel2, SRC, ORC, RxBIAS1, RxBIAS2 * 384/360 outputs (Osel) * Capable of outputting 256 values by means of 10-by-2 external power modules (20 units) and a D/A converter * Logic power supply voltage (VDD1): 2.7 to 3.6V * Driver power supply voltage (VDD2): 10.0 to 16.5V * High-speed data transfer: fCLK = 190 MHz MAX. (internal data transfer speed when operating at VDD1 = 2.7 V) * Output dynamic range: VSS2 + 0.2 V to VDD2 - 0.2 V * Apply for dot-line inversion, n-line inversion * Output voltage polarity inversion function (POL) ORDERING INFORMATION Part Number Package TCP (TAB package) COF (COF package)
PD160010N-xxx PD160010NL-xxx
Remark The TCP/COF's external shape is customized. To order the required shape, please contact one of our sales representatives.
The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics sales representative for availability and additional information.
Document No. S16316EJ2V0DS00 (2nd edition) Date Published March 2004 NS CP (K) Printed in Japan
The mark shows major revised points.
2003
PD160010
1. BLOCK DIAGRAM
CLKA CLKB D0A D0B D1A D1B D2A D2B D3A D3B
SB STHR STHL STB
D0 toD3 CLK
RxBIAS1,RxBIAS2 SerialtoParallelConverter VDD1A VSS1A VDD1D VSS1D
Osel R,/L
Logic Controller
STHR STHL Bi-directionalshiftregister
Latch
V0-V19
VDD2 D/Aconverter VSS2
POL SRC ORC MODE Vsel1,Vsel2 Voltagefolloweroutput
-------------------------------S1 S2 S3 S384
Remark /xxx indicates active low signals.
2. RELATIONSHIP BETWEEN OUTPUT CIRCUIT AND D/A CONVERTER
S1
*
S2
*
S383
*
S384
*
POL
V9 V10 V19
*****
V0 Multiplexer
10
8-bit D/A converter 10
2
*****
Data Sheet S16316EJ2V0DS
PD160010
3. PIN CONFIGURATION (PD160010NL-xxx:COF, Copper Foil Surface, Face-down)
VSS2 VDD2 V0 V1 V2 V3 V4 V5 V6 V7 V8 V9 (VD D 1D ) TEST (VSS 1D ) TEST (VD D 1D ) TEST (VSS 1D ) ORC (VD D 1D ) S TH R STH L PO L S TB (VSS 1D ) SR C (VD D 1D ) TEST TEST TEST VS S1D V SS1A (VS S1A) D 0A D 0B (VS S1A) D 1A D 1B (VS S1A) C LK A C LK B (VS S1A) D 2A D 2B (VS S1A) D 3A D 3B V D D 1A V D D 1D TEST TEST TEST (VD D 1D ) R xBIA S2 (VSS 1D ) R xBIA S1 (VD D 1D ) Vsel1 (VSS 1D ) Vsel2 (VD D 1D ) O sel (VSS 1D ) R ,/L (VD D 1D ) MODE (VSS 1D ) SB (VD D 1D ) V10 V11 V12 V13 V14 V15 V16 V17 V18 V19 VDD2 VSS2
S1 S2 S3
C opper foil surface
S 382 S 383 S 384
Remarks 1. This figure does not specify the COF package. 2. (VDD1D) and (VSS1D) is available for supply to logic input terminal. Please don't use these pins for power supply terminal with current. (VSS1A) must be connected to analog GND on PCB.
Data Sheet S16316EJ2V0DS
3
PD160010
4. PIN FUNCTIONS
(1/2)
Pin Symbol S1 to S384 D0A, D0B D1A, D1B D2A, D2B D3A, D3B CLKA, CLKB R,/L Shift direction control Shift clock Input (mini-LVDS) Input (CMOS) Shift clock. Refer to Table 4-1. The shift direction control pin of shift register. The shift directions of the shift registers are as follows. R,/L = H (right shift): STHR input, S1S384, STHL output R,/L = L (left shift): STHL input, S384S1, STHR output STHR STHL STB POL Right shift start pulse Left shift start pulse Latch Polarity Input (CMOS) Input (CMOS) SB Bus-line set-back Input (CMOS) RxBIAS1, RxBIAS2 mini-LVDS receiver bias voltage control Input (CMOS) I/O (CMOS) This is the start pulse I/O pin when connected in cascade. Loading of display data starts when a high level is read. For right shift, STHR is input and STHL is output. For left shift, STHL is input and STHR is output. Change the input mode, latched the registered data and transfer to DAC at the rising edge. And supplied voltage to LCD pixel is output at falling edge. Control the polarity of the output. Input of the POL signal is allowed the setup time (t14) with respect to STB's rising edge. Refer to Table 4-3. Change the data order of mini-LVDS input. Refer to Table 4-1. Input "L" level to this pin. This pin controls the bias current of mini-LVDS receiver circuit. Please refer to the following table. RxBIAS1 L L H H Osel Number of output pins select pin Input (CMOS) RxBIAS2 L H L H IBIAS I1 (Low power) I2 I3 I4 (High power) Pin Name Driver Gray scale data I/O Output Input (mini-LVDS) Description The D/A converted 256-gray-scale analog voltage is output. Display data with gray-scale data (8-bit) and control signal (RST = reset). Refer to Table 4-1.
This pin selects the number of output pins. Osel = L: 384-output mode Osel = H: 360-output mode Output pins S181 through S204 are invalid in 360-output mode.
SRC ORC MODE
Slew-rate control Output resistance control Output reset control
Input (CMOS) Input (CMOS) Input (CMOS)
SRC = H: High-slew-rate mode (large current consumption) SRC = L: Low-slew-rate mode (small current consumption) ORC = H: Low output resistance mode ORC = L: High output resistance mode MODE = H: Output reset MODE = L: No output reset
4
Data Sheet S16316EJ2V0DS
PD160010
(2/2)
Pin Symbol Vsel1, Vsel2 Pin Name VDD2 selector I/O Input (CMOS) Description This pin controls the bias current of output amplifier. Logic input to Vsel1 and Vsel2 have a dependence on VDD2 and load condition and so on. Output waveform simulation should be done before decision. Vsel1 L L H H V0 to V19 Vsel2 L H L H VDD2 Range (reference) 10.5 V TYP. 12.5 V TYP. 16.0 V TYP. Non-assign
-corrected power
supplies
-
Input the -corrected power supplies from outside. Make sure to maintain the following relationships. During the gray scale voltage output, be sure to keep the gray scale level power supply at a constant level. VDD2 - 0.2 V V0 > V1 > V2 > V3 > V4 > V5 > V6 > V7 > V8 > V9 0.5 VDD2 0.5 VDD2 V10 > V11 >V12 > V13 > V14 > V15 > V16 >V17 > V18 > V19 VSS2 + 0.2 V
VDD1D VDD1A VDD2 VSS1D VSS1A VSS2 TEST
Low-voltage logic power supply Low-voltage analog power supply Driver power supply Low-voltage logic ground Low-voltage analog ground Driver ground TEST
- - - - - - Input (CMOS)
2.7 to 3.6 V VDD1D and VDD1A should be same electric potential. 2.7 to 3.6 V VDD1D and VDD1A should be same electric potential. 10.0 to 16.5 V Ground for internal logic circuit. Please wire VSS1D and VSS1A in external circuit boards. Ground for internal mini-LVDS receiver circuit. Please wire VSS1D and VSS1A in external circuit boards. Ground for internal high voltage circuit. Please leave these pins open in normal operation mode.
Cautions 1. The power start sequence must be VDD1, logic input, and VDD2 & V0-V19 in that order. Reverse this sequence to shut down. 2. To stabilize the supply voltage, please be sure to insert a 0.47 F bypass capacitor between VDD1-VSS1 and VDD2-VSS2. Furthermore, for increased precision of the D/A converter, insertion of a bypass capacitor of about 0.01 F is also advised between the -corrected power supply terminals (V0, V1, V2,....., V19) and VSS2.
Data Sheet S16316EJ2V0DS
5
PD160010
Table 4-1. Function (Bus-line Set-Back)
Pin Name D0A D0B D1A D1B CLKA CLKB D2A D2B D3A D3B SB = L D0(+) D0(-) D1(+) D1(-) CLK(+) CLK(-) D2(+) D2(-) D3(+) D3(-)
Remark Suffix "+" indicates positive polarity and "-" indicates negative polarity at each differential signal input pair.
Table 4-2. Function (R,/L and STHR(L))
R,/L H (Right shift) L (Left shift) STHR IN OUT STHL OUT IN Shift Direction S1 S384 S384 S1
Table 4-3. Function (POL and -corrected power supplies)
POL H L Odd Numbered Output V10-V19 V0-V9 Even Numbered Output V0-V9 V10-V19
6
Data Sheet S16316EJ2V0DS
PD160010
5. RELATIONSHIP BETWEEN INPUT DATA AND OUTPUT VOLTAGE VALUE
PD160010 incorporates a 8-bit D/A converter whose odd output pins and even output pins output respectively gray
scale voltages of differing polarity with respect to the LCD's counter electrode (common electrode) voltage. The D/A converter consists of ladder resistors and switches. Figure 5-1 shows the relationship between the driving voltages such as liquid-crystal driving voltages VDD2, VSS2 and common electrode potential VCOM, and -corrected voltages V0-V19 and the input data. Be sure to maintain the voltage relationships of below. VDD2 - 0.2 V V0 > V1 > V2 > V3 > V4 > V5 > V6 > V7 > V8 > V9 0.5 VDD2 0.5 VDD2 V10 > V11 > V12 > V13 > V14 > V15 > V16 > V17 > V18 > V19 VSS2 + 0.2 V Figures 5-2 shows -corrected power supply and ladder resistors ratio and figure 5-3 shows the relationship between the input data and the output data. Figure 5-1. Relationship between Input Data and -corrected Power Supplies
VDD2 0.2 V V0 V1 V2 V3 64 V4 V5 V6 V7 14 V8 V9 0.5 VDD2 V10 V11 V12 V13 V14 V15 V16 V17 V18 V19 0.2 V VSS2 00 01 0F 3F 7F Input data (HEX.) BF DF F0 FE FF 48 14 1 1 14 17 32 64 64 1 64 32 17 1 14 48
Split interval
Data Sheet S16316EJ2V0DS
7
PD160010
Figure 5-2. -corrected Power Supply and Ladder Resistors Ratio
V0 R1 V1 R2 V2 R3 V3 R4 V4 R5 V5 R6 V6 R7 V7 R8 V8 R9 V9 V19 V18 R18 V17 R17 V16 R16 V15 R15 V14 R14 V13 R13 V12 R12 V11 R11 V10 R10
PositivePolarity
NegativePolarity
R1, R18: r0 R2, R17: r1 to r14 R3, R16: r15 to r62 R4, R15: r63 to r126 R5, R14: r127 to r190 R6, R13: r191 to r222 R7, R12: r223 to r239 R8, R11: r240 to r253 R9, R10: r254
Rn R1, R18 R2, R17 R3, R16 R4, R15 R5, R14 R6, R13 R7, R12 R8, R13 R9, R10 Ratio 173 1475 2419 2083 1940 1219 794 1373 525
rn r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 r11 r12 r13 r14 r15 r16 r17 r18 r19 r20 r21 r22 r23 r24 r25 r26 r27 r28 r29 r30 r31 r32 r33 r34 r35 r36 r37 r38 r39 r40 r41 r42 r43 r44 r45 r46 r47 r48 r49 r50 r51 r52 r53 r54 r55 r56 r57 r58 r59 r60 r61 r62 r63
Ratio 173 155 142 131 122 114 107 102 97 93 89 85 82 79 77 74 72 70 69 67 65 64 62 61 60 59 58 57 56 55 54 53 52 51 51 50 49 49 48 47 47 46 46 45 45 44 44 43 43 43 42 42 41 41 41 40 40 40 39 39 39 38 38 38
rn r64 r65 r66 r67 r68 r69 r70 r71 r72 r73 r74 r75 r76 r77 r78 r79 r80 r81 r82 r83 r84 r85 r86 r87 r88 r89 r90 r91 r92 r93 r94 r95 r96 r97 r98 r99 r100 r101 r102 r103 r104 r105 r106 r107 r108 r109 r110 r111 r112 r113 r114 r115 r116 r117 r118 r119 r120 r121 r122 r123 r124 r125 r126 r127
Ratio 38 37 37 37 37 36 36 36 36 35 35 35 35 35 34 34 34 34 34 34 33 33 33 33 33 33 33 32 32 32 32 32 32 32 32 31 31 31 31 31 31 31 31 31 31 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 29 29
rn r128 r129 r130 r131 r132 r133 r134 r135 r136 r137 r138 r139 r140 r141 r142 r143 r144 r145 r146 r147 r148 r149 r150 r151 r152 r153 r154 r155 r156 r157 r158 r159 r160 r161 r162 r163 r164 r165 r166 r167 r168 r169 r170 r171 r172 r173 r174 r175 r176 r177 r178 r179 r180 r181 r182 r183 r184 r185 r186 r187 r188 r189 r190 r191
Ratio 29 29 29 29 29 29 29 29 29 29 29 29 29 29 29 29 29 29 29 29 29 29 29 29 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 31 31 31 31 31 31 31 31 31 32 32 32 32 32 32 32 33 33 33 33 33 33 34 34
rn r192 r193 r194 r195 r196 r197 r198 r199 r200 r201 r202 r203 r204 r205 r206 r207 r208 r209 r210 r211 r212 r213 r214 r215 r216 r217 r218 r219 r220 r221 r222 r223 r224 r225 r226 r227 r228 r229 r230 r231 r232 r233 r234 r235 r236 r237 r238 r239 r240 r241 r242 r243 r244 r245 r246 r247 r248 r249 r250 r251 r252 r253 r254
Ratio 34 34 35 35 35 35 35 36 36 36 37 37 37 37 38 38 38 39 39 39 40 40 40 41 41 41 42 42 42 43 43 43 44 44 44 45 45 46 46 46 47 47 48 48 49 50 50 52 53 55 57 59 62 66 71 78 86 98 114 138 178 258 525
8
Data Sheet S16316EJ2V0DS
PD160010
Figure 5-3. Relationship between Input Data and Output Voltage (1/2) (Output voltage) VDD2 - 0.2 V V0 > V1 > V2 > V3 > V4 > V5 > V6 > V7 > V8 > V9 0.5 VDD2
D ata 00H 01H 02H 03H 04H 05H 06H 07H 08H 09H 0A H 0B H 0C H 0D H 0E H 0FH 10H 11H 12H 13H 14H 15H 16H 17H 18H 19H 1A H 1B H 1C H 1D H 1E H 1FH 20H 21H 22H 23H 24H 25H 26H 27H 28H 29H 2A H 2B H 2C H 2D H 2E H 2FH 30H 31H 32H 33H 34H 35H 36H 37H 38H 39H 3A H 3B H 3C H 3D H 3E H 3FH O utput V oltage V 0' V 1' V 2' V 3' V 4' V 5' V 6' V 7' V 8' V 9' V 10' V 11' V 12' V 13' V 14' V 15' V 16' V 17' V 18' V 19' V 20' V 21' V 22' V 23' V 24' V 25' V 26' V 27' V 28' V 29' V 30' V 31' V 32' V 33' V 34' V 35' V 36' V 37' V 38' V 39' V 40' V 41' V 42' V 43' V 44' V 45' V 46' V 47' V 48' V 49' V 50' V 51' V 52' V 53' V 54' V 55' V 56' V 57' V 58' V 59' V 60' V 61' V 62' V 63' V 0 V 1 V 1-V X 2+(V 2) V 1-V X 2+(V 2) V 1-V X 2+(V 2) V 1-V X 2+(V 2) V 1-V X 2+(V 2) V 1-V X 2+(V 2) V 1-V X 2+(V 2) V 1-V X 2+(V 2) V 1-V X 2+(V 2) V 1-V X 2+(V 2) V 1-V X 2+(V 2) V 1-V X 2+(V 2) V 1-V X 2+(V 2) V 2 V 2-V X 3+(V 3) V 2-V X 3+(V 3) V 2-V X 3+(V 3) V 2-V X 3+(V 3) V 2-V X 3+(V 3) V 2-V X 3+(V 3) V 2-V X 3+(V 3) V 2-V X 3+(V 3) V 2-V X 3+(V 3) V 2-V X 3+(V 3) V 2-V X 3+(V 3) V 2-V X 3+(V 3) V 2-V X 3+(V 3) V 2-V X 3+(V 3) V 2-V X 3+(V 3) V 2-V X 3+(V 3) V 2-V X 3+(V 3) V 2-V X 3+(V 3) V 2-V X 3+(V 3) V 2-V X 3+(V 3) V 2-V X 3+(V 3) V 2-V X 3+(V 3) V 2-V X 3+(V 3) V 2-V X 3+(V 3) V 2-V X 3+(V 3) V 2-V X 3+(V 3) V 2-V X 3+(V 3) V 2-V X 3+(V 3) V 2-V X 3+(V 3) V 2-V X 3+(V 3) V 2-V X 3+(V 3) V 2-V X 3+(V 3) V 2-V X 3+(V 3) V 2-V X 3+(V 3) V 2-V X 3+(V 3) V 2-V X 3+(V 3) V 2-V X 3+(V 3) V 2-V X 3+(V 3) V 2-V X 3+(V 3) V 2-V X 3+(V 3) V 2-V X 3+(V 3) V 2-V X 3+(V 3) V 2-V X 3+(V 3) V 2-V X 3+(V 3) V 2-V X 3+(V 3) V 2-V X 3+(V 3) V 2-V X 3+(V 3) V 3 1320 1178 1047 925 811 704 602 505 412 323 238 156 77 2345 2273 2203 2134 2067 2002 1938 1876 1815 1755 1696 1638 1581 1525 1470 1416 1363 1311 1260 1209 1159 1110 1061 1013 966 919 873 827 782 737 693 649 606 563 520 478 436 395 354 313 273 233 193 154 115 76 38 / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / 1475 1475 1475 1475 1475 1475 1475 1475 1475 1475 1475 1475 1475 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 D ata 40H 41H 42H 43H 44H 45H 46H 47H 48H 49H 4A H 4B H 4C H 4D H 4E H 4FH 50H 51H 52H 53H 54H 55H 56H 57H 58H 59H 5A H 5B H 5C H 5D H 5E H 5FH 60H 61H 62H 63H 64H 65H 66H 67H 68H 69H 6A H 6B H 6C H 6D H 6E H 6FH 70H 71H 72H 73H 74H 75H 76H 77H 78H 79H 7A H 7B H 7C H 7D H 7E H 7FH V 64' V 65' V 66' V 67' V 68' V 69' V 70' V 71' V 72' V 73' V 74' V 75' V 76' V 77' V 78' V 79' V 80' V 81' V 82' V 83' V 84' V 85' V 86' V 87' V 88' V 89' V 90' V 91' V 92' V 93' V 94' V 95' V 96' V 97' V 98' V 99' V 100' V 101' V 102' V 103' V 104' V 105' V 106' V 107' V 108' V 109' V 110' V 111' V 112' V 113' V 114' V 115' V 116' V 117' V 118' V 119' V 120' V 121' V 122' V 123' V 124' V 125' V 126' V 127' O utput V oltage V 3-V X 2045 4+(V 4) V 3-V X 2007 4+(V 4) V 3-V X 1970 4+(V 4) V 3-V X 1933 4+(V 4) V 3-V X 1896 4+(V 4) V 3-V X 1859 4+(V 4) V 3-V X 1823 4+(V 4) V 3-V X 1787 4+(V 4) V 3-V X 1751 4+(V 4) V 3-V X 1715 4+(V 4) V 3-V X 1680 4+(V 4) V 3-V X 1645 4+(V 4) V 3-V X 1610 4+(V 4) V 3-V X 1575 4+(V 4) V 3-V X 1540 4+(V 4) V 3-V X 1506 4+(V 4) V 3-V X 1472 4+(V 4) V 3-V X 1438 4+(V 4) V 3-V X 1404 4+(V 4) V 3-V X 1370 4+(V 4) V 3-V X 1336 4+(V 4) V 3-V X 1303 4+(V 4) V 3-V X 1270 4+(V 4) V 3-V X 1237 4+(V 4) V 3-V X 1204 4+(V 4) V 3-V X 1171 4+(V 4) V 3-V X 1138 4+(V 4) V 3-V X 1105 4+(V 4) V 3-V X 1073 4+(V 4) V 3-V X 1041 4+(V 4) V 3-V X 1009 4+(V 4) V 3-V X 4+(V 4) 977 V 3-V X 4+(V 4) 945 V 3-V X 4+(V 4) 913 V 3-V X 4+(V 4) 881 V 3-V X 4+(V 4) 849 V 3-V X 4+(V 4) 818 V 3-V X 4+(V 4) 787 V 3-V X 4+(V 4) 756 V 3-V X 4+(V 4) 725 V 3-V X 4+(V 4) 694 V 3-V X 4+(V 4) 663 V 3-V X 4+(V 4) 632 V 3-V X 4+(V 4) 601 V 3-V X 4+(V 4) 570 V 3-V X 4+(V 4) 539 V 3-V X 4+(V 4) 509 V 3-V X 4+(V 4) 479 V 3-V X 4+(V 4) 449 V 3-V X 4+(V 4) 419 V 3-V X 4+(V 4) 389 V 3-V X 4+(V 4) 359 V 3-V X 4+(V 4) 329 V 3-V X 4+(V 4) 299 V 3-V X 4+(V 4) 269 V 3-V X 4+(V 4) 239 V 3-V X 4+(V 4) 209 V 3-V X 4+(V 4) 179 V 3-V X 4+(V 4) 149 V 3-V X 4+(V 4) 119 V 3-V X 4+(V 4) 89 V 3-V X 4+(V 4) 59 V 3-V X 4+(V 4) 29 V 4 / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 D ata 80H 81H 82H 83H 84H 85H 86H 87H 88H 89H 8A H 8B H 8C H 8D H 8E H 8FH 90H 91H 92H 93H 94H 95H 96H 97H 98H 99H 9A H 9B H 9C H 9D H 9E H 9FH A 0H A 1H A 2H A 3H A 4H A 5H A 6H A 7H A 8H A 9H AH A AH B AH C AH D AH E A FH B 0H B 1H B 2H B 3H B 4H B 5H B 6H B 7H B 8H B 9H BH A BH B BH C BH D BH E B FH V 128' V 129' V 130' V 131' V 132' V 133' V 134' V 135' V 136' V 137' V 138' V 139' V 140' V 141' V 142' V 143' V 144' V 145' V 146' V 147' V 148' V 149' V 150' V 151' V 152' V 153' V 154' V 155' V 156' V 157' V 158' V 159' V 160' V 161' V 162' V 163' V 164' V 165' V 166' V 167' V 168' V 169' V 170' V 171' V 172' V 173' V 174' V 175' V 176' V 177' V 178' V 179' V 180' V 181' V 182' V 183' V 184' V 185' V 186' V 187' V 188' V 189' V 190' V 191' OV utput oltage V 4-V X 1911 5+(V 5) V 4-V X 1882 5+(V 5) V 4-V X 1853 5+(V 5) V 4-V X 1824 5+(V 5) V 4-V X 1795 5+(V 5) V 4-V X 1766 5+(V 5) V 4-V X 1737 5+(V 5) V 4-V X 1708 5+(V 5) V 4-V X 1679 5+(V 5) V 4-V X 1650 5+(V 5) V 4-V X 1621 5+(V 5) V 4-V X 1592 5+(V 5) V 4-V X 1563 5+(V 5) V 4-V X 1534 5+(V 5) V 4-V X 1505 5+(V 5) V 4-V X 1476 5+(V 5) V 4-V X 1447 5+(V 5) V 4-V X 1418 5+(V 5) V 4-V X 1389 5+(V 5) V 4-V X 1360 5+(V 5) V 4-V X 1331 5+(V 5) V 4-V X 1302 5+(V 5) V 4-V X 1273 5+(V 5) V 4-V X 1244 5+(V 5) V 4-V X 1215 5+(V 5) V 4-V X 1185 5+(V 5) V 4-V X 1155 5+(V 5) V 4-V X 1125 5+(V 5) V 4-V X 1095 5+(V 5) V 4-V X 1065 5+(V 5) V 4-V X 1035 5+(V 5) V 4-V X 1005 5+(V 5) V 4-V X 5+(V 5) 975 V 4-V X 5+(V 5) 945 V 4-V X 5+(V 5) 915 V 4-V X 5+(V 5) 885 V 4-V X 5+(V 5) 855 V 4-V X 5+(V 5) 825 V 4-V X 5+(V 5) 795 V 4-V X 5+(V 5) 765 V 4-V X 5+(V 5) 735 V 4-V X 5+(V 5) 704 V 4-V X 5+(V 5) 673 V 4-V X 5+(V 5) 642 V 4-V X 5+(V 5) 611 V 4-V X 5+(V 5) 580 V 4-V X 5+(V 5) 549 V 4-V X 5+(V 5) 518 V 4-V X 5+(V 5) 487 V 4-V X 5+(V 5) 456 V 4-V X 5+(V 5) 424 V 4-V X 5+(V 5) 392 V 4-V X 5+(V 5) 360 V 4-V X 5+(V 5) 328 V 4-V X 5+(V 5) 296 V 4-V X 5+(V 5) 264 V 4-V X 5+(V 5) 232 V 4-V X 5+(V 5) 199 V 4-V X 5+(V 5) 166 V 4-V X 5+(V 5) 133 V 4-V X 5+(V 5) 100 V 4-V X 5+(V 5) 67 V 4-V X 5+(V 5) 34 V 5 / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 D ata C 0H C 1H C 2H C 3H C 4H C 5H C 6H C 7H C 8H C 9H CH A CH B CH C CH D CH E C FH D 0H D 1H D 2H D 3H D 4H D 5H D 6H D 7H D 8H D 9H DH A DH B DH C DH D DH E D FH E 0H E 1H E 2H E 3H E 4H E 5H E 6H E 7H E 8H E 9H EH A EH B EH C EH D EH E E FH F0H F1H F2H F3H F4H F5H F6H F7H F8H F9H FA H FB H FC H FD H FE H FFH V 192' V 193' V 194' V 195' V 196' V 197' V 198' V 199' V 200' V 201' V 202' V 203' V 204' V 205' V 206' V 207' V 208' V 209' V 210' V 211' V 212' V 213' V 214' V 215' V 216' V 217' V 218' V 219' V 220' V 221' V 222' V 223' V 224' V 225' V 226' V 227' V 228' V 229' V 230' V 231' V 232' V 233' V 234' V 235' V 236' V 237' V 238' V 239' V 240' V 241' V 242' V 243' V 244' V 245' V 246' V 247' V 248' V 249' V 250' V 251' V 252' V 253' V 254' V 255' OV utput oltage V 5-V X 1185 6+(V 6) V 5-V X 1151 6+(V 6) V 5-V X 1117 6+(V 6) V 5-V X 1082 6+(V 6) V 5-V X 1047 6+(V 6) V 5-V X 1012 6+(V 6) V 5-V X 6+(V 6) 977 V 5-V X 6+(V 6) 942 V 5-V X 6+(V 6) 906 V 5-V X 6+(V 6) 870 V 5-V X 6+(V 6) 834 V 5-V X 6+(V 6) 797 V 5-V X 6+(V 6) 760 V 5-V X 6+(V 6) 723 V 5-V X 6+(V 6) 686 V 5-V X 6+(V 6) 648 V 5-V X 6+(V 6) 610 V 5-V X 6+(V 6) 572 V 5-V X 6+(V 6) 533 V 5-V X 6+(V 6) 494 V 5-V X 6+(V 6) 455 V 5-V X 6+(V 6) 415 V 5-V X 6+(V 6) 375 V 5-V X 6+(V 6) 335 V 5-V X 6+(V 6) 294 V 5-V X 6+(V 6) 253 V 5-V X 6+(V 6) 212 V 5-V X 6+(V 6) 170 V 5-V X 6+(V 6) 128 V 5-V X 6+(V 6) 86 V 5-V X 6+(V 6) 43 V 6 V 6-V X 7+(V 7) 751 V 6-V X 7+(V 7) 707 V 6-V X 7+(V 7) 663 V 6-V X 7+(V 7) 619 V 6-V X 7+(V 7) 574 V 6-V X 7+(V 7) 529 V 6-V X 7+(V 7) 483 V 6-V X 7+(V 7) 437 V 6-V X 7+(V 7) 391 V 6-V X 7+(V 7) 344 V 6-V X 7+(V 7) 297 V 6-V X 7+(V 7) 249 V 6-V X 7+(V 7) 201 V 6-V X 7+(V 7) 152 V 6-V X 7+(V 7) 102 V 6-V X 7+(V 7) 52 V 7 V 7-V X 1320 8+(V 8) V 7-V X 1265 8+(V 8) V 7-V X 1208 8+(V 8) V 7-V X 1149 8+(V 8) V 7-V X 1087 8+(V 8) V 7-V X 1021 8+(V 8) V 7-V X 8+(V 8) 950 V 7-V X 8+(V 8) 872 V 7-V X 8+(V 8) 786 V 7-V X 8+(V 8) 688 V 7-V X 8+(V 8) 574 V 7-V X 8+(V 8) 436 V 7-V X 8+(V 8) 258 V 8 V 9 / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / 1219 1219 1219 1219 1219 1219 1219 1219 1219 1219 1219 1219 1219 1219 1219 1219 1219 1219 1219 1219 1219 1219 1219 1219 1219 1219 1219 1219 1219 1219 1219 794 794 794 794 794 794 794 794 794 794 794 794 794 794 794 794 1373 1373 1373 1373 1373 1373 1373 1373 1373 1373 1373 1373 1373
Data Sheet S16316EJ2V0DS
9
PD160010
Figure 5-3. Relationship between Input Data and Output Voltage (2/2) (Output voltage) 0.5 VDD2 V10 > V11 > V12 > V13 > V14 > V15 > V16 > V17 > V18 > V19 VSS2 + 0.2 V
D ata 00H 01H 02H 03H 04H 05H 06H 07H 08H 09H 0A H 0B H 0C H 0D H 0E H 0FH 10H 11H 12H 13H 14H 15H 16H 17H 18H 19H 1A H 1B H 1C H 1D H 1E H 1FH 20H 21H 22H 23H 24H 25H 26H 27H 28H 29H 2A H 2B H 2C H 2D H 2E H 2FH 30H 31H 32H 33H 34H 35H 36H 37H 38H 39H 3A H 3B H 3C H 3D H 3E H 3FH OV utput oltage V 0'' V 1'' V 2'' V 3'' V 4'' V 5'' V 6'' V 7'' V 8'' V 9'' V 10'' V 11'' V 12'' V 13'' V 14'' V 15'' V 16'' V 17'' V 18'' V 19'' V 20'' V 21'' V 22'' V 23'' V 24'' V 25'' V 26'' V 27'' V 28'' V 29'' V 30'' V 31'' V 32'' V 33'' V 34'' V 35'' V 36'' V 37'' V 38'' V 39'' V 40'' V 41'' V 42'' V 43'' V 44'' V 45'' V 46'' V 47'' V 48'' V 49'' V 50'' V 51'' V 52'' V 53'' V 54'' V 55'' V 56'' V 57'' V 58'' V 59'' V 60'' V 61'' V 62'' V 63'' V 19 V 18 V 18+(V 18) X 17-V V 18+(V 18) X 17-V V 18+(V 18) X 17-V V 18+(V 18) X 17-V V 18+(V 18) X 17-V V 18+(V 18) X 17-V V 18+(V 18) X 17-V V 18+(V 18) X 17-V V 18+(V 18) X 17-V V 18+(V 18) X 17-V V 18+(V 18) X 17-V V 18+(V 18) X 17-V V 18+(V 18) X 17-V V 17 V 17+(V 17) X 16-V V 17+(V 17) X 16-V V 17+(V 17) X 16-V V 17+(V 17) X 16-V V 17+(V 17) X 16-V V 17+(V 17) X 16-V V 17+(V 17) X 16-V V 17+(V 17) X 16-V V 17+(V 17) X 16-V V 17+(V 17) X 16-V V 17+(V 17) X 16-V V 17+(V 17) X 16-V V 17+(V 17) X 16-V V 17+(V 17) X 16-V V 17+(V 17) X 16-V V 17+(V 17) X 16-V V 17+(V 17) X 16-V V 17+(V 17) X 16-V V 17+(V 17) X 16-V V 17+(V 17) X 16-V V 17+(V 17) X 16-V V 17+(V 17) X 16-V V 17+(V 17) X 16-V V 17+(V 17) X 16-V V 17+(V 17) X 16-V V 17+(V 17) X 16-V V 17+(V 17) X 16-V V 17+(V 17) X 16-V V 17+(V 17) X 16-V V 17+(V 17) X 16-V V 17+(V 17) X 16-V V 17+(V 17) X 16-V V 17+(V 17) X 16-V V 17+(V 17) X 16-V V 17+(V 17) X 16-V V 17+(V 17) X 16-V V 17+(V 17) X 16-V V 17+(V 17) X 16-V V 17+(V 17) X 16-V V 17+(V 17) X 16-V V 17+(V 17) X 16-V V 17+(V 17) X 16-V V 17+(V 17) X 16-V V 17+(V 17) X 16-V V 17+(V 17) X 16-V V 17+(V 17) X 16-V V 17+(V 17) X 16-V V 16 155 297 428 550 664 771 873 970 1063 1152 1237 1319 1398 74 146 216 285 352 417 481 543 604 664 723 781 838 894 949 1003 1056 1108 1159 1210 1260 1309 1358 1406 1453 1500 1546 1592 1637 1682 1726 1770 1813 1856 1899 1941 1983 2024 2065 2106 2146 2186 2226 2265 2304 2343 2381 / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / 1475 1475 1475 1475 1475 1475 1475 1475 1475 1475 1475 1475 1475 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 2419 D ata 40H 41H 42H 43H 44H 45H 46H 47H 48H 49H 4A H 4B H 4C H 4D H 4E H 4FH 50H 51H 52H 53H 54H 55H 56H 57H 58H 59H 5A H 5B H 5C H 5D H 5E H 5FH 60H 61H 62H 63H 64H 65H 66H 67H 68H 69H 6A H 6B H 6C H 6D H 6E H 6FH 70H 71H 72H 73H 74H 75H 76H 77H 78H 79H 7A H 7B H 7C H 7D H 7E H 7FH V 64'' V 65'' V 66'' V 67'' V 68'' V 69'' V 70'' V 71'' V 72'' V 73'' V 74'' V 75'' V 76'' V 77'' V 78'' V 79'' V 80'' V 81'' V 82'' V 83'' V 84'' V 85'' V 86'' V 87'' V 88'' V 89'' V 90'' V 91'' V 92'' V 93'' V 94'' V 95'' V 96'' V 97'' V 98'' V 99'' V 100'' V 101'' V 102'' V 103'' V 104'' V 105'' V 106'' V 107'' V 108'' V 109'' V 110'' V 111'' V 112'' V 113'' V 114'' V 115'' V 116'' V 117'' V 118'' V 119'' V 120'' V 121'' V 122'' V 123'' V 124'' V 125'' V 126'' V 127'' OV utput oltage V 16+(V 16) X 15-V 38 V 16+(V 16) X 15-V 76 V 16+(V 16) X 15-V 113 V 16+(V 16) X 15-V 150 V 16+(V 16) X 15-V 187 V 16+(V 16) X 15-V 224 V 16+(V 16) X 15-V 260 V 16+(V 16) X 15-V 296 V 16+(V 16) X 15-V 332 V 16+(V 16) X 15-V 368 V 16+(V 16) X 15-V 403 V 16+(V 16) X 15-V 438 V 16+(V 16) X 15-V 473 V 16+(V 16) X 15-V 508 V 16+(V 16) X 15-V 543 V 16+(V 16) X 15-V 577 V 16+(V 16) X 15-V 611 V 16+(V 16) X 15-V 645 V 16+(V 16) X 15-V 679 V 16+(V 16) X 15-V 713 V 16+(V 16) X 15-V 747 V 16+(V 16) X 15-V 780 V 16+(V 16) X 15-V 813 V 16+(V 16) X 15-V 846 V 16+(V 16) X 15-V 879 V 16+(V 16) X 15-V 912 V 16+(V 16) X 15-V 945 V 16+(V 16) X 15-V 978 V 16+(V 16) X 1010 15-V V 16+(V 16) X 1042 15-V V 16+(V 16) X 1074 15-V V 16+(V 16) X 1106 15-V V 16+(V 16) X 1138 15-V V 16+(V 16) X 1170 15-V V 16+(V 16) X 1202 15-V V 16+(V 16) X 1234 15-V V 16+(V 16) X 1265 15-V V 16+(V 16) X 1296 15-V V 16+(V 16) X 1327 15-V V 16+(V 16) X 1358 15-V V 16+(V 16) X 1389 15-V V 16+(V 16) X 1420 15-V V 16+(V 16) X 1451 15-V V 16+(V 16) X 1482 15-V V 16+(V 16) X 1513 15-V V 16+(V 16) X 1544 15-V V 16+(V 16) X 1574 15-V V 16+(V 16) X 1604 15-V V 16+(V 16) X 1634 15-V V 16+(V 16) X 1664 15-V V 16+(V 16) X 1694 15-V V 16+(V 16) X 1724 15-V V 16+(V 16) X 1754 15-V V 16+(V 16) X 1784 15-V V 16+(V 16) X 1814 15-V V 16+(V 16) X 1844 15-V V 16+(V 16) X 1874 15-V V 16+(V 16) X 1904 15-V V 16+(V 16) X 1934 15-V V 16+(V 16) X 1964 15-V V 16+(V 16) X 1994 15-V V 16+(V 16) X 2024 15-V V 16+(V 16) X 2054 15-V V 15 / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 2083 D ata 80H 81H 82H 83H 84H 85H 86H 87H 88H 89H 8A H 8B H 8C H 8D H 8E H 8FH 90H 91H 92H 93H 94H 95H 96H 97H 98H 99H 9A H 9B H 9C H 9D H 9E H 9FH A 0H A 1H A 2H A 3H A 4H A 5H A 6H A 7H A 8H A 9H AH A AH B AH C AH D AH E A FH B 0H B 1H B 2H B 3H B 4H B 5H B 6H B 7H B 8H B 9H BH A BH B BH C BH D BH E B FH V 128'' V 129'' V 130'' V 131'' V 132'' V 133'' V 134'' V 135'' V 136'' V 137'' V 138'' V 139'' V 140'' V 141'' V 142'' V 143'' V 144'' V 145'' V 146'' V 147'' V 148'' V 149'' V 150'' V 151'' V 152'' V 153'' V 154'' V 155'' V 156'' V 157'' V 158'' V 159'' V 160'' V 161'' V 162'' V 163'' V 164'' V 165'' V 166'' V 167'' V 168'' V 169'' V 170'' V 171'' V 172'' V 173'' V 174'' V 175'' V 176'' V 177'' V 178'' V 179'' V 180'' V 181'' V 182'' V 183'' V 184'' V 185'' V 186'' V 187'' V 188'' V 189'' V 190'' V 191'' OV utput oltage V 15+(V 15) X 14-V 29 V 15+(V 15) X 14-V 58 V 15+(V 15) X 14-V 87 V 15+(V 15) X 14-V 116 V 15+(V 15) X 14-V 145 V 15+(V 15) X 14-V 174 V 15+(V 15) X 14-V 203 V 15+(V 15) X 14-V 232 V 15+(V 15) X 14-V 261 V 15+(V 15) X 14-V 290 V 15+(V 15) X 14-V 319 V 15+(V 15) X 14-V 348 V 15+(V 15) X 14-V 377 V 15+(V 15) X 14-V 406 V 15+(V 15) X 14-V 435 V 15+(V 15) X 14-V 464 V 15+(V 15) X 14-V 493 V 15+(V 15) X 14-V 522 V 15+(V 15) X 14-V 551 V 15+(V 15) X 14-V 580 V 15+(V 15) X 14-V 609 V 15+(V 15) X 14-V 638 V 15+(V 15) X 14-V 667 V 15+(V 15) X 14-V 696 V 15+(V 15) X 14-V 725 V 15+(V 15) X 14-V 755 V 15+(V 15) X 14-V 785 V 15+(V 15) X 14-V 815 V 15+(V 15) X 14-V 845 V 15+(V 15) X 14-V 875 V 15+(V 15) X 14-V 905 V 15+(V 15) X 14-V 935 V 15+(V 15) X 14-V 965 V 15+(V 15) X 14-V 995 V 15+(V 15) X 1025 14-V V 15+(V 15) X 1055 14-V V 15+(V 15) X 1085 14-V V 15+(V 15) X 1115 14-V V 15+(V 15) X 1145 14-V V 15+(V 15) X 1175 14-V V 15+(V 15) X 1205 14-V V 15+(V 15) X 1236 14-V V 15+(V 15) X 1267 14-V V 15+(V 15) X 1298 14-V V 15+(V 15) X 1329 14-V V 15+(V 15) X 1360 14-V V 15+(V 15) X 1391 14-V V 15+(V 15) X 1422 14-V V 15+(V 15) X 1453 14-V V 15+(V 15) X 1484 14-V V 15+(V 15) X 1516 14-V V 15+(V 15) X 1548 14-V V 15+(V 15) X 1580 14-V V 15+(V 15) X 1612 14-V V 15+(V 15) X 1644 14-V V 15+(V 15) X 1676 14-V V 15+(V 15) X 1708 14-V V 15+(V 15) X 1741 14-V V 15+(V 15) X 1774 14-V V 15+(V 15) X 1807 14-V V 15+(V 15) X 1840 14-V V 15+(V 15) X 1873 14-V V 15+(V 15) X 1906 14-V V 14 / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 1940 D ata CV 0H 192'' CV 1H 193'' CV 2H 194'' CV 3H 195'' CV 4H 196'' CV 5H 197'' CV 6H 198'' CV 7H 199'' CV 8H 200'' CV 9H 201'' CH V A 202'' CH V B 203'' CHV C 204'' CHV D 205'' CH V E 206'' CV FH 207'' DV 0H 208'' DV 1H 209'' DV 2H 210'' DV 3H 211'' DV 4H 212'' DV 5H 213'' DV 6H 214'' DV 7H 215'' DV 8H 216'' DV 9H 217'' DH V A 218'' DH V B 219'' DHV C 220'' DHV D 221'' DH V E 222'' DV FH 223'' EV 0H 224'' EV 1H 225'' EV 2H 226'' EV 3H 227'' EV 4H 228'' EV 5H 229'' EV 6H 230'' EV 7H 231'' EV 8H 232'' EV 9H 233'' EHV A 234'' EHV B 235'' EHV C 236'' EHV D 237'' EHV E 238'' EV FH 239'' F0H V 240'' F1H V 241'' F2H V 242'' F3H V 243'' F4H V 244'' F5H V 245'' F6H V 246'' F7H V 247'' F8H V 248'' F9H V 249'' FA V H 250'' FB V H 251'' FC V H 252'' FD V H 253'' FE V H 254'' FFH V 255'' OV utput oltage V 14+(V 14) X 13-V 34 V 14+(V 14) X 13-V 68 V 14+(V 14) X 13-V 102 V 14+(V 14) X 13-V 137 V 14+(V 14) X 13-V 172 V 14+(V 14) X 13-V 207 V 14+(V 14) X 13-V 242 V 14+(V 14) X 13-V 277 V 14+(V 14) X 13-V 313 V 14+(V 14) X 13-V 349 V 14+(V 14) X 13-V 385 V 14+(V 14) X 13-V 422 V 14+(V 14) X 13-V 459 V 14+(V 14) X 13-V 496 V 14+(V 14) X 13-V 533 V 14+(V 14) X 13-V 571 V 14+(V 14) X 13-V 609 V 14+(V 14) X 13-V 647 V 14+(V 14) X 13-V 686 V 14+(V 14) X 13-V 725 V 14+(V 14) X 13-V 764 V 14+(V 14) X 13-V 804 V 14+(V 14) X 13-V 844 V 14+(V 14) X 13-V 884 V 14+(V 14) X 13-V 925 V 14+(V 14) X 13-V 966 V 14+(V 14) X 1007 13-V V 14+(V 14) X 1049 13-V V 14+(V 14) X 1091 13-V V 14+(V 14) X 1133 13-V V 14+(V 14) X 1176 13-V V 13 V 13+(V 13) X 12-V 43 V 13+(V 13) X 12-V 87 V 13+(V 13) X 12-V 131 V 13+(V 13) X 12-V 175 V 13+(V 13) X 12-V 220 V 13+(V 13) X 12-V 265 V 13+(V 13) X 12-V 311 V 13+(V 13) X 12-V 357 V 13+(V 13) X 12-V 403 V 13+(V 13) X 12-V 450 V 13+(V 13) X 12-V 497 V 13+(V 13) X 12-V 545 V 13+(V 13) X 12-V 593 V 13+(V 13) X 12-V 642 V 13+(V 13) X 12-V 692 V 13+(V 13) X 12-V 742 V 12 V 12+(V 12) X 11-V 53 V 12+(V 12) X 11-V 108 V 12+(V 12) X 11-V 165 V 12+(V 12) X 11-V 224 V 12+(V 12) X 11-V 286 V 12+(V 12) X 11-V 352 V 12+(V 12) X 11-V 423 V 12+(V 12) X 11-V 501 V 12+(V 12) X 11-V 587 V 12+(V 12) X 11-V 685 V 12+(V 12) X 11-V 799 V 12+(V 12) X 11-V 937 V 12+(V 12) X 1115 11-V V 11 V 10 / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / / 1219 1219 1219 1219 1219 1219 1219 1219 1219 1219 1219 1219 1219 1219 1219 1219 1219 1219 1219 1219 1219 1219 1219 1219 1219 1219 1219 1219 1219 1219 1219 794 794 794 794 794 794 794 794 794 794 794 794 794 794 794 794 1373 1373 1373 1373 1373 1373 1373 1373 1373 1373 1373 1373 1373
10
Data Sheet S16316EJ2V0DS
PD160010
6. FUNCTION DESCRIPTION
6.1 Input Data Mapping Display data and control data (RST) are input to D0(+/-) to D3(+/-). Data mapping is changed in response to the mode, and the mode is changed by STB.

CL K (+) D0(+) D1(+) D2(+) D3(+) D00 D10 D20 D30 D01 D11 D21 D31 D02 D12 D22 D32 D03 D13 D23 D33 D04 D14 D24 D34 D05 D15 D25 D35 D06 D16 D26 D36 D07 D17 D27 D37 D00 D10 D20 D30 D01 D11 D21 D31
DataInputCycle

6.2 Composition of Display Data
MSB Dn7 Dn6 Dn5 Dn4 Dn3 Dn2 Dn1 LSB Dn0
Remark n=0to3
Data Sheet S16316EJ2V0DS
11
PD160010
6.3 Relation between Display Data and Output Number This relationship is irrespective of R,/L condition. (1) In case of 384 channel output (a) Right shift (R,/L = H)
Output Display Data S1 D00 to D07 S2 D10 to D17 S3 D20 to D27 S382 D10 to D17 S383 D20 to D27 S384 D30 to D37
(b) Left shift (R,/L = L)
Output Display Data S384 D30 to D37 S383 D20 to D27 S382 D10 to D17 S3 D20 to D27 S2 D10 to D17 S1 D00 to D07
(2) In case of 360 channel output (a) Right shift (R,/L = H)
Output Display Data S1 S2 S3 S180 D30 to D37 S181 to S204 NA S205 D00 to D07 S382 D10 to D17 S383 S384 D00 to D07 D10 to D17 D20 to D27 D20 to D27 D30 to D37
Remark NA: Non-assign (b) Left shift (R,/L = L)
Output Display Data S384 S383 S382 S205 D00 to D07 S204 to S181 NA S180 D30 to D37 S3 D20 to D27 S2 D10 to D17 S1 D00 to D07 D30 to D37 D20 to D27 D10 to D17
Remark NA: Non-assign 6.4 Cascade Multiple chips can be used in a cascade connection. * Input STHR(L) pad at lead (head) chip is fixed to H. * Input STHR(L) after secondary chips are connected from output STHR(L) at foregoing chip. * Output STHR(L) of final stage driver IC can support current load up to 1.0 mA (MAX.) by using pull-up or pull-down resistor.
12
Data Sheet S16316EJ2V0DS
PD160010
6.5 Taking in the Display Data
(1) The lead (head) chip is set to control signal input mode (so called control mode), and the receivers at D0(+/-) and CLK(+/-) of all chips are activated by rising edge of STB. (2) Input the reset (RST) signal as L to D0(+/-). This RST should be kept over 200 ns after rising of STB. (3) RST as H is input to D0(+/-) and H width should be over 50 ns and also over 3 CLK cycles. (4) Input the RST as L to D0(+/-) and then changed to the data input mode function. By the way, input STB again when a second RST is necessary. (5) Data sampling starts at the rising edge of CLK after reading of "RST = L". (6) At the same time data sampling starts, internal counter starts counting the data cycle for STHR(L) signal generation. (7) After data sampling is finished, the receivers turn OFF. (8) After the receivers turn OFF, keep the timing for more than 5 CLK cycles until STB is applied. (9) Figure 6-1 shows the rough timing chart from application of STB to the start of data sampling.
Figure 6-1 Timing from Start to Sampling (reference)
ReadtheReset(RST) ReadtheRST=L CL K 1 CLK(+)
D0(+)
RST Overthan50ns & 3CLKcycle
Data1
Data2
D1(+)toD3(+) 200ns
Data1
Data2
Startthedatasampling STB
STHR(L) Controlsignalinputmode Datainputmode
Data Sheet S16316EJ2V0DS
13
PD160010
7. ELECTRICAL SPECIFICATIONS
Absolute Maximum Ratings (TA = 25C, VSS1 = VSS2 = 0 V)
Parameter Logic power supply voltage Driver power supply voltage Logic input voltage Logic output voltage Logic output current Driver input voltage Driver output voltage Operating ambient temperature Storage temperature Symbol VDD1 VDD2 VI1 VO1 IO VI2 VO2 TA Tstg Ratings -0.5 to +4.0 -0.5 to +18.0 -0.5 to VDD1 + 0.5 -0.5 to VDD1 + 0.5 1.0 -0.5 to VDD2 + 0.5 -0.5 to VDD2 + 0.5 -10 to +90 -55 to +125 Unit V V V V mA V V C C
Caution Product quality may suffer if the absolute maximum rating is exceeded even momentarily for any parameter. That is, the absolute maximum ratings are rated values at which the product is on the verge of suffering physical damage, and therefore the product must be used under conditions that ensure that the absolute maximum ratings are not exceeded. Recommended Operating Range (TA = -10 to +90 C, VSS1 = VSS2 = 0 V)
Parameter Logic power supply voltage Driver power supply voltage CMOS high-level input voltage CMOS low-level input voltage Symbol VDD1 VDD2 VIH VIL STHR(L), R,/L, STB, SB, POL, Osel, RxBIAS1, RxBIAS2, SRC, ORC, Vsel1, Vsel2 mini-LVDS input voltage (Center) mini-LVDS differential voltage range (Amplitude: peak to peak) VID V0-V9 V10-V19 Driver output voltage Clock frequency VOUT fCLK CLKA, CLKB, TA = 25C, VDD1 = 3.0 V, VID = 200 mV, VI = 1.7 V VDD1 = 3.0 V, VI = 1.7 V 200 0.5 VDD2 0.2 0.2 159 VI VDD1 =3.0 V, VID = 200 mV 0.3 + (VID/2) (VDD1-1.2) - (VID/2) 600 VDD2 - 0.2 0.5 VDD2 VDD2 - 0.2 190 mV V V V MHz V Condition MIN. 2.7 10.0 0.7 VDD1 0 TYP. 3.0 15.4 MAX. 3.6 16.5 VDD1 0.3 VDD1 Unit V V V V
- corrected voltage
14
Data Sheet S16316EJ2V0DS
PD160010
Electrical Characteristics (TA = 25 C, VDD1 = 3.0 V, VDD2 = 13.0 V, VSS1 = VSS2 = 0 V)
Parameter Input leakage current Symbol IIL Condition STHR(L), R,/L, STB, SB, POL, Osel, RxBIAS1, RxBIAS2, SRC, ORC, Vsel1, Vsel2, CLKA, CLKB, D0A, D0B to D3A, D3B MIN. TYP. MAX. 1.0 Unit
A
-corrected resistor value
Driver output current
R IVOH IVOL
V0-V9 = V10 -V19 VX = VDD2 - 0.2 V, VOUT = VX - 1.0 V VX = VSS2 + 0.2 V, VOUT = VX + 1.0 V Input: 00H to 3FH Input: 40H to 7FH, 80H to BFH Input: C0H to FFH Input: 3FH, 7FH, BFH Checkered, fSTB = 100 kHz (PW = 500 ns), fCLK =159 MHz, VDD1 = 3.6 V
Note1
7.8 , 360
12.0 - 334 527 10 7 4 16
16.3 - 200
k
A A
low output resistance mode (ORC = H)
Note1
,
low output resistance mode (ORC = H) Output swing voltage difference deviation
Note2
VP-P 1 VP-P 2 VP-P 3 AVO IDD11
20 15 10 20 7.50
mV mV mV mV mA
Output swing voltage average deviation
Note3
Logic dynamic current consumption
Logic static current consumption
IDD12
No CLK & Input, VDD1 = 3.6 V Raster pattern, VDD2 = 16.5 V, fSTB = 100 kHz (PW = 500 ns), with no load
4.50 30.0
mA mA
Driver dynamic current consumption IDD21
Driver static current consumption
IDD22
Raster pattern, VDD2 = 16.5 V, Input: FFH, with no load
30.0
mA
Notes1. VX refers to the output voltage of analog output pins S1 to S384. VOUT refers to the voltage applied to analog output pins S1 to S384. 2. Amplitude offset when all of output ports out same data. 3. Deviation of averaged amplitude offset value between chips.
Data Sheet S16316EJ2V0DS
15
PD160010
Switching Characteristics (TA = 25 C, VDD1 = 3.0 V, VDD2 = 13.0 V, VSS1 = VSS2 = 0 V)
Parameter Start pulse delay time Driver output delay time t1 t2 t3 t4 t5 Input capacitance CI1 CI2 CMOS interface, STHR(L) mini-LVDS interface, Except STHR(L), V0-V19 Symbol CL = 50 pF RL = 7 k, CL = 65 pF Refer to Condition MIN. 6 TYP. 15 2.1 3.9 1.3 3.4 10 5 MAX. 22 2.5 5.0 2.5 5.0 15 10 Unit ns
s s s s
pF pF

Measurementpoint
RL1 RL2 RL3 RL4 RL5 RLn = 1.4 k CLn = 13 pF CL1 CL2 CL3 CL4 CL5
Output
GND
Timing Requirements (TA = 25 C, VDD1 = 3.0 V, VSS1 = 0 V, tr = tf = 0.5 ns)
Parameter Clock pulse width Clock pulse high period Clock pulse low period Data setup time Data hold time Start pulse setup time STB pulse width POL setup time RST high period Receiver OFF to STB timing STB to RST input time Symbol t6 t7 t8 t9 t10 t11 t13 t14 t16 t17 t18 Condition MIN. 5.2 2.1 2.1 1.0 1.0 0 200 -5.0 50.0 3 5 200 TYP. 6.2 2.6 2.6 MAX. Unit ns ns ns ns ns ns ns ns ns CLK CLK ns
Remark Unless otherwise specified, VIH and VIL of the CMOS signals are defined as VIH = 0.7 VDD1, VIL = 0.3 VDD1.
16
Data Sheet S16316EJ2V0DS
(Clock and display data numbers are examples when W-SXGA+ is used.)
Switching Characteristic Waveform (R,/L = H)
Unless otherwise specified, VIH and VIL of the CMOS signals are defined as VIH = 0.7 VDD1, VIL = 0.3 VDD1.
Also, unless otherwise specified, VIH and VIL of the mini-LVDS signals are defined as VIH = VIL = VI (Center of VID).
@W-SXGA+:1680x1050 t6 t7 CLK(+) CLK(-)
360/2520 50% 50%
ReadtheReset=H
ReadtheReset=L t20 t21
1/1 2/2 50% 359/359 50% 1/361 50% 5/365 50% 9/369 50% 10/370 80% 20% 50%
t8
361/2521 50% 365/2525 50% 50% 20%
LastDataTiming LV0(-) LV0(+)
Data Data Data NA NA NA NA NA NA
RST=L RST=L RST=H
t16
RST=H
t9 t10 t9 t10
NA
RST=L
NA
Data
Data
Data
Data
Data
Data
Data
Data
Data
Data
Data
Data
Data
ControlSignalInputMode LV0(+/-)to Data LV3(+/-)
Data Data NA NA NA NA NA NA NA NA NA NA NA NA NA Data
DataInputMode
Data Data Data Data Data Data Data Data Data Data Data Data
Data Sheet S16316EJ2V0DS
STHR(L)/Input@#1
Fixed"H"
t1 t12 STHR(R)/Output@#1 STHR(L)/Input@#2 t17
70% "L" 30%
t11
"H" "H"
t1 t12
70% 30%
t11
"L"
t19
t18
70% 30%
t13
70% 30%
STB t14 POL
70% 30%
t15
70% 30%
t3 t2
8BitAccuracy
Hi-Z Output
-0.1VDD2 +0.1VDD2
PD160010
8BitAccuracy
t4 t5
17
PD160010
8. RECOMMENDED MOUNTING CONDITIONS The following conditions must be met for mounting conditions of the PD160010. For more details, refer to the [Semiconductor Device Mount Manual] (http://www.necel.com/pkg/en/mount/index.html) Please consult with our sales offices in case other mounting process is used, or in case the mounting is done under different conditions.
PD160010N-xxx: TCP (TAB Package)
Mounting Condition Thermocompression Mounting Method Soldering ACF (Adhesive Conductive Film) solder). Temporary bonding 70 to 100C, pressure 3 to 8 kg/cm , time 3 to 5 sec. Real bonding 165 to 180C pressure 25 to 45 kg/cm , time 30 to 40 sec. (When using the anisotropy conductive film SUMIZAC1003 of Sumitomo Bakelite, Ltd.)
2 2
Condition Heating tool 300 to 350C, heating for 2 to 3 sec, pressure 100g (per
Caution To find out the detailed conditions for mounting the ACF part, please contact the ACF manufacturing company. Be sure to avoid using two or more mounting methods at a time.
18
Data Sheet S16316EJ2V0DS
PD160010
NOTES FOR CMOS DEVICES
1 VOLTAGE APPLICATION WAVEFORM AT INPUT PIN Waveform distortion due to input noise or a reflected wave may cause malfunction. If the input of the CMOS device stays in the area between VIL (MAX) and VIH (MIN) due to noise, etc., the device may malfunction. Take care to prevent chattering noise from entering the device when the input level is fixed, and also in the transition period when the input level passes through the area between VIL (MAX) and VIH (MIN). 2 HANDLING OF UNUSED INPUT PINS Unconnected CMOS device inputs can be cause of malfunction. If an input pin is unconnected, it is possible that an internal input level may be generated due to noise, etc., causing malfunction. CMOS devices behave differently than Bipolar or NMOS devices. Input levels of CMOS devices must be fixed high or low by using pull-up or pull-down circuitry. Each unused pin should be connected to VDD or GND via a resistor if there is a possibility that it will be an output pin. All handling related to unused pins must be judged separately for each device and according to related specifications governing the device. 3 PRECAUTION AGAINST ESD A strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and ultimately degrade the device operation. Steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it when it has occurred. Environmental control must be adequate. When it is dry, a humidifier should be used. It is recommended to avoid using insulators that easily build up static electricity. Semiconductor devices must be stored and transported in an anti-static container, static shielding bag or conductive material. All test and measurement tools including work benches and floors should be grounded. The operator should be grounded using a wrist strap. Semiconductor devices must not be touched with bare hands. Similar precautions need to be taken for PW boards with mounted semiconductor devices. 4 STATUS BEFORE INITIALIZATION Power-on does not necessarily define the initial status of a MOS device. Immediately after the power source is turned ON, devices with reset functions have not yet been initialized. Hence, power-on does not guarantee output pin levels, I/O settings or contents of registers. A device is not initialized until the reset signal is received. A reset operation must be executed immediately after power-on for devices with reset functions.
Data Sheet S16316EJ2V0DS
19

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